Near-Optimal Padding for Removing Conflict Misses
نویسندگان
چکیده
The effectiveness of the memory hierarchy is critical for the performance of current processors. The performance of the memory hierarchy can be improved by means of program transformations such as padding, which is a code transformation targeted to reduce conflict misses. This paper presents a novel approach to perform near-optimal padding for multi-level caches. It analyzes programs, detecting conflict misses by means of the Cache Miss Equations. A genetic algorithm is used to compute the parameter values that enhance the program. Our results show that it can remove practically all conflicts among variables in the SPECfp95, targeting all the different cache levels simultaneously.
منابع مشابه
Compiler Optimizations for Eliminating Cache Conflict Misses
Limited set-associativity in hardware caches can cause conflict misses when multiple data items map to the same cache locations. Conflict misses have been found to be a significant source of poor cache performance in scientific programs, particularly within loop nests. We present two compiler transformations to eliminate conflict misses: 1) modifying variable base addresses, 2) padding inner ar...
متن کاملA Compiler Framework for Restructuring Data Declarations
It has been observed that memory access performance can be improved by restructuring data declarations , using simple transformations such as array dimension padding and inter-array padding (array alignment) to reduce the number of misses in the cache and TLB (translation lookaside buuer). These transformations can be applied to both static and dynamic array variables. In this paper, we provide...
متن کاملA Compiler Framework for Restructuring Data Declarations to Enhance Cache and Tlb Eeectiveness
It has been observed that memory access performance can be improved by restructuring data declarations , using simple transformations such as array dimension padding and inter-array padding (array alignment) to reduce the number of misses in the cache and TLB (translation lookaside buuer). These transformations can be applied to both static and dynamic array variables. In this paper, we provide...
متن کاملCache Optimization for Coarse Grain Task Parallel Processing Using Inter-Array Padding
The wide use of multiprocessor system has been making automatic parallelizing compilers more important. To improve the performance of multiprocessor system more by compiler, multigrain parallelization is important. In multigrain parallelization, coarse grain task parallelism among loops and subroutines and near fine grain parallelism among statements are used in addition to the traditional loop...
متن کاملA Compiler Framework for Restructuring Data Declarations to Enhance Cache and TLB E ectiveness
It has been observed that memory access performance can be improved by restructuring data declarations, using simple transformations such as array dimension padding and inter-array padding (array alignment) to reduce the number of misses in the cache and TLB (translation lookaside bu er). These transformations can be applied to both static and dynamic array variables. In this paper, we provide ...
متن کامل